Wednesday, 24 June 2015

Microprocessor Based System Design


Microprocessor Sure Questions
Q.1 If the crystal oscillator is operating at 15 MHz, the PCLK output of 8284 is
(A) 2.5 MHz. (B) 5 MHz.
(C) 7.5 MHz. (D) 10 MHz.
view answer
Ans: (A)
Q.2 In which T-state does the CPU sends the address to memory or I/O and the ALE signal
for demultiplexing
(A) T1. (B) T2.
(C) T3. (D) T4.
view answer
Ans, During the first clocking period in a bus cycle, which is called T1, the address of the memory or I/O location is sent out and the control signals ALE, DT/R’ and IO/M’ are also output. Hence answer is (A).
Q.3 If a 1M×1 DRAM requires 4 ms for a refresh and has 256 rows to be refreshed, no
more than __________ of time must pass before another row is refreshed.
(A) 64 ms. (B) 4 ns.
(C) 0.5 ns. (D) 15.625 μs .
view answer
Ans Answer is (B)
Q.4 In a DMA write operation the data is transferred
(A) from I/O to memory. (B) from memory to I/O.
(C) from memory to memory. (D) from I/O to I/O.
view answer
Ans A DMA writes operation transfers data from an I/O device to memory. Hence answer is (A).
Q.5 Which type of JMP instruction assembles if the distance is 0020 h bytes
(A) near. (B) far.
(C) short. (D) none of the above.
view answer
Ans The three byte near jump allows a branch or jump within ± 32K bytes. Hence answer is (A).
Q.6 A certain SRAM has CS = 0 , WE = 0 and OE = 1. In which of the following modes this SRAM is operating
(A) Read (B) Write
(C) Stand by (D) None of the above
view answer
Ans For CS’=WE’=0, write operation. Hence answer is (B).
Q.7 Which of the following is true with respect to EEPROM?
(A) contents can be erased byte wise only.
(B) contents of full memory can be erased together.
(C) contents can be erased using ultra violet rays
(D) contents can not be erased
view answer
Ans Answer is (C).
Q.8 Pseudo instructions are basically
(A) false instructions.
(B) instructions that are ignored by the microprocessor.
(C) assembler directives.
(D) instructions that are treated like comments.
view answer
Ans Pseudo-instructions are commands to the assembler. All pseudo-operations start with a period. Pseudo-instructions are composed of a pseudo-operation which may be followed by one or more expressions. Hence answer is (C).
Q.9 Number of the times the instruction sequence below will loop before coming out of
loop is
MOV AL, 00h
A1: INC AL
JNZ A1
(A) 00 (B) 01
(C) 255 (D) 256
Ans Answer is (D)
Q.10 What will be the contents of register AL after the following has been executed
MOV BL, 8C
MOV AL, 7E
ADD AL, BL
(A) 0A and carry flag is set (B) 0A and carry flag is reset
(C) 6A and carry flag is set (D) 6A and carry flag is reset
view answer
Ans, Result is 1,0A. Hence answer is (A).
Q.11 Direction flag is used with
(A) String instructions. (B) Stack instructions.
(C) Arithmetic instructions. (D) Branch instructions.
view answer
Ans The direction flag is used only with the string instructions.Hence answer is (A).
Q.12 Ready pin of a microprocessor is used
(A) to indicate that the microprocessor is ready to receive inputs.
(B) to indicate that the microprocessor is ready to receive outputs.
(C) to introduce wait states.
(D) to provide direct memory access.
view answer
Ans This input is controlled to insert wait states into the timing of the microprocessor.
Hence answer is (C).
Q.13 These are two ways in which a microprocessor can come out of Halt state.
(A) When hold line is a logical 1.
(B) When interrupt occurs and the interrupt system has been enabled.
(C) When both (A) and (B) are true.
(D) When either (A) or (B) are true.
view answer
Ans Answer is (A)
Q.14 In the instruction FADD, F stands for
(A) Far. (B) Floppy.
(C) Floating. (D) File.
view answer
Ans Adds two floating point numbers. Hence answer is (C).
Q.15 SD RAM refers to
(A) Synchronous DRAM (B) Static DRAM
(C) Semi DRAM (D) Second DRAM
view answer
Ans, Answer is (A)
Q.16 In case of DVD, the speed is referred in terms of n X (for example 32 X). Here, X
refers to
(A) 150 KB/s (B) 300 KB/s
(C) 1.38 MB/s (D) 2.4 MB/s
view answer
Ans Answer is (C).
Q.17 Itanium processor of Intel is a
(A) 32 bit microprocessor. (B) 64 bit microprocessor.
(C) 128 bit microprocessor. (D) 256 bit microprocessor.
view answer
Ans The Itanium is a 64-bit architecture microprocessor. Hence answer is (B).
Q.18 LOCK prefix is used most often
(A) during normal execution. (B) during DMA accesses
(C) during interrupt servicing. (D) during memory accesses.
view answer
Ans LOCK is a prefix which is used to make an instruction of 8086 non-interruptable.Hence answer is (C).
Q.19 The Pentium microprocessor has______execution units.
(A) 1 (B) 2
(C) 3 (D) 4
view answer
Ans The Pentium microprocessor is organized with three execution units. One executes floating-point instructions, and the other two (U-pipe and V-pipe) execute integer instructions. Hence answer is (C).
Q.20 EPROM is generally erased by using
(A) Ultraviolet rays (B) infrared rays
(C) 12 V electrical pulse (D) 24 V electrical pulse
view answer
Ans The EPROM is erasable if exposed to high-intensity ultraviolet light for about 20 minutes or less. Hence answer is (A)
Q.21 Signal voltage ranges for a logic high and for a logic low in RS-232C standard are
(A) Low = 0 volt to 1.8 volt, high = 2.0 volt to 5 volt
(B) Low =-15 volt to –3 vol, high = +3 volt to +15 volt
(D) Low = +3 volt to +15 volt, high = -3 volt to -15 volt
(E) Low = 2 volt to 5.0 volt, high = 0 volt to 1.8 volt
view answer
Ans Answer is (B)
Q.22 The PCI bus is the important bus found in all the new Pentium systems because
(A) It has plug and play characteristics
(B) It has ability to function with a 64 bit data bus
(C) Any Microprocessor can be interfaced to it with PCI controller or bridge
(D) All of the above
view answer
Ans, Answer is (D).
Q.23 Which of the following statement is true?
(A) The group of machine cycle is called a state.
(B) A machine cycle consists of one or more instruction cycle.
(C) An instruction cycle is made up of machine cycles and a machine cycle is
made up of number of states.
(D) None of the above
view answer
Ans An instruction cycle consists of several machine cycles. Hence Answer is (B).
Q.24 8251 is a
(A) UART
(B) USART
(C) Programmable Interrupt controller
(D) Programmable interval timer/counter
view answer
Ans The Intel 8251 is a programmable communication interface. It is USART.
Q.25 8088 microprocessor has
(A) 16 bit data bus (B) 4 byte pre-fetch queue
(C) 6 byte pre-fetch queue (D) 16 bit address bus
view answer
Ans The 8088 is a 16-bit microprocessor with an 8-bit data bus. The 16-bit address bus. Hence answer is (D).

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